Well lately I have been reading the processor manuals when all the sudden a most brilliant idea struck me. Most of us are familiar with the following sets of instructions:
J?? (7x or 0F 8x)
CMOV??
SET??

Now lets see here they apply conditional jumps to mov and set instructions not others. Those instructions also take up a whopping total of 64 opcodes in a 511 opcode set!(255(non 0F) + 256(0F)) Well sorry but um why in the world did Intel just not make a simple 16 prefixes. Conditional PREFIXES in fact. Then we could use EB/E9 to do conditional jumps. All of the mov instructions could be conditional and think about the possibilities with having conditional add, sub, mul, rot, etc. This would free up tons of opcodes and add tons of functionality. And it wouldnt be a major architecture redesign on the chip at all. Chip would still execute the same its just the prefix would trigger some additional microcode. Is what I am saying logical? Yes I know backward compatibility blah blah blah. But hey this adds a ton of functionality and makes things a lot more clean cut in my opinion saving tons of opcodes.

Snatch